How do you learn to program trading ?

ASM? Assembler ? Contrary to popular belief you dont need to get into assembler to do low latency trading, risk management is more important
Is processing complexity not portion of the information transfer delay?

How is risk managment connected?
 
Is processing complexity not portion of the information transfer delay?

How is risk managment connected?
The heavy processing is done offline beforehand, a few microseconds won't make or break it. Risk management is connected by controlling responses to inventory jumps
 
The heavy processing is done offline beforehand, a few microseconds won't make or break it. Risk management is connected by controlling responses to inventory jumps
Accessing lookup tables or means for seeking precalculated info seems like light processing.
Then idk if it would matter if its Python, C or ASM. Perhaps bigger delay is in networking or elsewhere.
 
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Accessing lookup tables or means for seeking precalculated info seems also part like processing.
But then idk if it would matter if its Python, C or ASM. Perhaps bigger delay is in networking or elsewhere.
You might be right, im using memory mapped files for lookup , there is room for optimization, my first jump would be from Java to C rather than straight to asm. Networking delay is ther but its only about 60 micros
 
You might be right, im using memory mapped files for lookup , there is room for optimization, my first jump would be from Java to C rather than straight to asm. Networking delay is ther but its only about 60 micros
Are you using M.2 drive?
Maybe single file that is constantly opened is faster than files?
 
Are you using M.2 drive?
Ssd. The sections are mapped into ram before they are accessed so storage latency is not an issue and I have 1TB of ram in the machine , but enough to store the whole day for several symbols
 
Are you using M.2 drive?
Maybe single file that is constantly opened is faster than files?
Java has a 2GB memory map limit, so I map 20 minutes or so worth of trading into each segment , and make sure the next segment is mapped before its needed and then unmap the segments no longer needed after time has passed. I let garbage collection do this now. Remains to be seen whether its worth it to port to C, since errors are a lot harder to debug in C/asm and its slower to develop in
 
I decided on M.2 SSD disk buffering system as memory overclocking opportunity might be worse at those sizes.
I considered it but would have cost another 2k on top of a 20k machine. Main ram speed seems to be the issue. Hft studies show that profitability decreases as a function of latency , 125ms totally kills any profitability. I dont think the difference between 60 and 61 microseconds is even statistically distinguishable
 
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